talent skill-assertion-based-verification - Lucres

Talent Search

Anand Manaji · @anandmanaji

Fresher

ASIC design debugging techniques scripting languages hardware verification code optimization systemVerilog UVM methodology constrained random testing coverage-driven verification virtual sequences assertion-based verification testbench architecture scoreboard implementation functional coverage.

Prashanth S · @sai

Fresher

digital electronics verilog system verilog system verilog assertion universal verification methodology

Venkata Lakshmi Supriya · @kurapati

senior Associate consultant, Infosys

5+ Years

Bengaluru, India

Azure AD Connect Identity Management Conditional Access Policies Multi-Factor Authentication Single Sign-On User Provisioning Group Management Role-Based Access Control

Shweta Pandit · @shwetapandit

Frontend Developer, Sekel Tech

1+ Years

JavaScript Frontend Development Single Page Applications Component-based Architecture State Management Vue Router Vuex Responsive Design API Integration Web Development

saivishal Varma · @mavericksai

Engineer, ZF India Pvt Ltd

3+ Years

Karimnagar, India

Signal Processing Embedded Systems Control Systems Hardware-in-the-loop Testing Real-time Simulation Test Automation Model-Based Design Simulink Python Programming Data Analysis